1. Field of the Invention
The present invention relates to a semiconductor memory device and a method of manufacturing the same, and more particularly to a capacitive element.
2. Description of the Background Art
Conventionally, to enhance permittivity or obtain ferroelectricity of a dielectric included in a capacitive element such as a capacitor, for higher integration with capacitance value ensured, use of an oxide dielectric film has been proposed. As an example of the oxide dielectric film, an oxide dielectric of perovskite system can be taken.
In a capacitor using the oxide dielectric film, a precious metal electrode is used. For the electrode is required not to be oxidized since an ambient atmosphere needed for forming an oxide dielectric film has an oxidizing power
There are two problems, however, in using the precious metal electrode as follows. The first problem is that the precious metal electrode has a poor adherence to an interlayer insulating film covering a capacitor and hence the precious metal electrode is removed from the interlayer insulating film in formation or after formation of the precious metal electrode.
The second problem is that the oxide dielectric film is reduced when a hydrogen sintering is performed, where an aluminum interconnection line connected to the capacitor is heat-treated in hydrogen. As the oxide dielectric film is reduced, oxygen deficiency in crystal grains of the oxide dielectric increases and a leak current flowing through deficiency level based thereon disadvantageously increases.
Although techniques to solve the first and second problems, such as interposing a so-called adhesion layer between the precious metal electrode and the interlayer insulating film and interposing a block layer having reduction species, have been proposed, the process becomes complicated and some dedicated facilities are needed.
A technique for upper electrode of layered structure is disclosed in Japanese Patent Application Laid Open Gazette No. 10-12844 as a technique of removing adsorbed water in an interface between the upper electrode of the capacitor and the interlayer insulating film, in Japanese Patent Application Laid Open Gazette No. 8-274270 as a technique of suppressing diffusion of, for example, lead from the oxide dielectric of perovskite and Japanese Patent Application Laid Open Gazette No. 9-139476 as a technique of suppressing out-of-composition of the dielectric film. A technique for lower electrode of layered structure is disclosed in Japanese Patent Application Laid Open Gazette Nos. 8-274270, 10-173149, 7-94680, 10-173138 and 9-139476.
The present invention is directed to a capacitive element. According to a first aspect of the present invention, the capacitive element comprises: a lower electrode; a dielectric layer formed on the lower electrode; and an upper electrode having a first layer formed on the dielectric layer and a second layer formed on the first layer and having a grain size larger than the first layer.
According to a second aspect of the present invention, in the capacitive element of the first aspect, the second layer is formed at higher temperature than the first layer.
According to a third aspect of the present invention, in the capacitive element of the first aspect, the second layer has higher concentration of oxidizer than the first layer.
According to a fourth aspect of the present invention, in the capacitive element of the third aspect, the second layer is formed in an atmosphere with higher concentration of oxidizer than the first layer.
According to a fifth aspect of the present invention, in the capacitive element of the first aspect, the upper electrode further has a third layer formed between the first and second layers and having a grain size larger than the second layer.
According to a sixth aspect of the present invention, the capacitive element comprises: a lower electrode formed on a substrate; a dielectric layer formed on the lower electrode and being thinner than the low electrode; and an upper electrode formed on the dielectric layer. In the capacitive element of the sixth aspect, unevenness in a surface of the lower electrode on the side of the dielectric layer is not larger than a tenth of the thickness of the dielectric layer and cycle of the unevenness in a direction parallel with the substrate is not larger than a half of the size of the lower electrode in the direction parallel with the substrate.
According to a seventh aspect of the present invention, in the capacitive element of the sixth aspect, the lower electrode has a first layer formed on the substrate and a second layer formed on the first layer, and the first layer is formed at higher temperature than the second layer.
According to an eighth aspect of the present invention, in the capacitive element of the seventh aspect, the lower electrode further has a third layer formed between the first and second layers and having a grain size larger than the first layer.
According to a ninth aspect of the present invention, in the capacitive element of the fifth or eighth aspect, the third layer is formed at higher temperature than the first and second layers.
In the capacitive element of the first aspect of the present invention, since the second layer of said upper electrode has less grain boundary and is hard to connect to that of the first layer, with less grain boundary diffusion caused, even if a hydrogen sintering is performed, reduction species are unlikely to reach the dielectric layer through the grain boundary. Further, since the surface area of the second layer increases, deterioration of the dielectric layer is suppressed and the adherence between the second layer and the interlayer insulating film if provided thereon is improved.
In the capacitive element of the second aspect of the present invention, crystal grains formed in the second layer are larger than those formed in the first layer
In the capacitive element of the third aspect of the present invention, since the oxidizer blocks transmission of reduction species in the second layer, the reduction species are unlikely to reach the dielectric layer.
In the capacitive element of the fourth aspect of the present invention, since an oxide is likely to be adsorbed to the first layer in formation of the second layer and inhibits movement of atoms constituting the second layer, granular growth is caused in the second layer to increase the surface area thereof.
In the capacitive element of the fifth aspect of the present invention, providing the third layer improves the effect of blocking transmission of reduction species while an increase of crystal grains in the second layer farthest from the electric layer is suppressed so that a good contact to the second layer may be obtained.
In the capacitive element of the sixth aspect of the present invention, since the unevenness in the surface of the lower electrode on the side of the dielectric layer, it is possible to suppress electric field concentration in the dielectric layer.
In the capacitive element of the seventh aspect of the present invention, the first layer and the lower electrode cause a chemical reaction to enhance adherence, while growth of crystal grains is suppressed in the second layer, to achieve evenness in the surface.
In the capacitive element of the eighth aspect of the present invention, providing the third layer improves the effect of the seventh aspect.
In the capacitive element of the ninth aspect of the present invention, crystal grains formed in the third layer are larger than those formed in the first and second layers.
An object of the present invention is to enhance adherence between an electrode and an interlayer insulating film without providing additional adhesion layer or block layer, that is, without additional facility or complicated process. Another object of the present invention is to suppress diffusion of reducing gas and prevent an increase of leak current in a dielectric.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.